merge of '6100fa1118decc83a309c2ccf8d128db2e9c2ef8'
and 'd804fb6b50abf7968a0198674912906c60ec9ff0'
This commit is contained in:
@ -1,5 +1,6 @@
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/*
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/*
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* Created on Jul 14, 2004
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* Created on Jul 14, 2004
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* Updated on Jan 8, 2011
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*/
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*/
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package freenet.support.CPUInformation;
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package freenet.support.CPUInformation;
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@ -129,11 +130,26 @@ public class CPUID {
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CPUIDResult c = doCPUID(1);
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CPUIDResult c = doCPUID(1);
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return c.EAX & 0xf;
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return c.EAX & 0xf;
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}
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}
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private static int getCPUFlags()
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private static int getEDXCPUFlags()
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{
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{
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CPUIDResult c = doCPUID(1);
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CPUIDResult c = doCPUID(1);
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return c.EDX;
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return c.EDX;
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}
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}
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private static int getECXCPUFlags()
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{
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CPUIDResult c = doCPUID(1);
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return c.ECX;
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}
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private static int getExtendedEDXCPUFlags()
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{
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CPUIDResult c = doCPUID(0x80000001);
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return c.EDX;
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}
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private static int getExtendedECXCPUFlags()
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{
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CPUIDResult c = doCPUID(0x80000001);
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return c.ECX;
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}
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//Returns a CPUInfo item for the current type of CPU
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//Returns a CPUInfo item for the current type of CPU
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//If I could I would declare this method in a interface named
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//If I could I would declare this method in a interface named
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@ -163,13 +179,25 @@ public class CPUID {
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return getCPUVendorID();
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return getCPUVendorID();
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}
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}
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public boolean hasMMX(){
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public boolean hasMMX(){
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return (getCPUFlags() & 0x800000) >0; //Bit 23
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return (getEDXCPUFlags() & 0x800000) >0; //EDX Bit 23
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}
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}
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public boolean hasSSE(){
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public boolean hasSSE(){
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return (getCPUFlags() & 0x2000000) >0; //Bit 25
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return (getEDXCPUFlags() & 0x2000000) >0; //EDX Bit 25
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}
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}
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public boolean hasSSE2(){
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public boolean hasSSE2(){
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return (getCPUFlags() & 0x4000000) >0; //Bit 26
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return (getEDXCPUFlags() & 0x4000000) >0; //EDX Bit 26
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}
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public boolean hasSSE3(){
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return (getEDXCPUFlags() & 0x1) >0; //ECX Bit 0
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}
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public boolean hasSSE41(){
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return (getEDXCPUFlags() & 0x80000) >0; //ECX Bit 19
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}
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public boolean hasSSE42(){
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return (getEDXCPUFlags() & 0x100000) >0; //ECX Bit 20
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}
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public boolean hasSSE4A(){
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return (getExtendedECXCPUFlags() & 0x40) >0; //Extended ECX Bit 6
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}
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}
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public boolean IsC3Compatible() { return false; }
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public boolean IsC3Compatible() { return false; }
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}
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}
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@ -297,76 +325,118 @@ public class CPUID {
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}
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}
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public boolean IsPentium3Compatible()
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public boolean IsPentium3Compatible()
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{
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{
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return getCPUFamily() > 6 || (getCPUFamily() == 6 && getCPUModel() >=7);
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// Atom
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if (getCPUExtendedModel() == 1 && (getCPUFamily() == 6 && (getCPUModel() == 10))){
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return true;
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// ??
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} else if (getCPUFamily() > 6 || (getCPUFamily() == 6 && getCPUModel() >=7)){
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return true;
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} else {
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return false;
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}
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}
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}
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public boolean IsPentium4Compatible()
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public boolean IsPentium4Compatible()
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{
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{
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return getCPUFamily() >= 15;
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// P4
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if (getCPUFamily() >= 15){
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return true;
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// Xeon MP (45nm) or Core i7
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} else if (getCPUExtendedModel() == 1 && (getCPUFamily() == 6 && (getCPUModel() == 10 || getCPUModel() == 13))){
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return true;
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// Core 2 Duo
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} else if (getCPUExtendedModel() == 0 && getCPUFamily() == 6 && getCPUModel() == 15){
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return true;
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} else {
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return false;
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}
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}
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}
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public String getCPUModelString() throws UnknownCPUException {
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public String getCPUModelString() throws UnknownCPUException {
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if(getCPUFamily() == 4){
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if (getCPUExtendedModel() == 0){
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switch(getCPUModel()){
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if(getCPUFamily() == 4){
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case 0:
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switch(getCPUModel()){
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return "486 DX-25/33";
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case 0:
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case 1:
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return "486 DX-25/33";
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return "486 DX-50";
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case 1:
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case 2:
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return "486 DX-50";
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return "486 SX";
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case 2:
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case 3:
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return "486 SX";
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return "486 DX/2";
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case 3:
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case 4:
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return "486 DX/2";
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return "486 SL";
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case 4:
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case 5:
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return "486 SL";
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return "486 SX/2";
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case 5:
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case 7:
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return "486 SX/2";
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return "486 DX/2-WB";
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case 7:
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case 8:
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return "486 DX/2-WB";
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return "486 DX/4";
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case 8:
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case 9:
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return "486 DX/4";
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return "486 DX/4-WB";
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case 9:
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}
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return "486 DX/4-WB";
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}
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}
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if(getCPUFamily() == 5){
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}
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switch(getCPUModel()){
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}
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case 0:
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if (getCPUExtendedModel() == 0){
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return "Pentium 60/66 A-step";
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if(getCPUFamily() == 5){
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case 1:
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switch(getCPUModel()){
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return "Pentium 60/66";
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case 0:
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case 2:
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return "Pentium 60/66 A-step";
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return "Pentium 75 - 200";
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case 1:
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case 3:
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return "Pentium 60/66";
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return "OverDrive PODP5V83";
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case 2:
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case 4:
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return "Pentium 75 - 200";
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return "Pentium MMX";
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case 3:
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case 7:
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return "OverDrive PODP5V83";
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return "Mobile Pentium 75 - 200";
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case 4:
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case 8:
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return "Pentium MMX";
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return "Mobile Pentium MMX";
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case 7:
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}
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return "Mobile Pentium 75 - 200";
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case 8:
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return "Mobile Pentium MMX";
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}
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}
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}
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}
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if(getCPUFamily() == 6){
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if(getCPUFamily() == 6){
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switch(getCPUModel()){
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if (getCPUExtendedModel() == 0){
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case 0:
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switch(getCPUModel()){
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return "Pentium Pro A-step";
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case 0:
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case 1:
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return "Pentium Pro A-step";
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return "Pentium Pro";
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case 1:
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case 3:
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return "Pentium Pro";
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return "Pentium II (Klamath)";
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case 3:
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case 5:
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return "Pentium II (Klamath)";
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return "Pentium II (Deschutes), Celeron (Covington), Mobile Pentium II (Dixon)";
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case 5:
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case 6:
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return "Pentium II (Deschutes), Celeron (Covington), Mobile Pentium II (Dixon)";
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return "Mobile Pentium II, Celeron (Mendocino)";
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case 6:
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case 7:
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return "Mobile Pentium II, Celeron (Mendocino)";
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return "Pentium III (Katmai)";
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case 7:
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case 8:
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return "Pentium III (Katmai)";
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return "Pentium III (Coppermine), Celeron w/SSE";
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case 8:
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case 9:
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return "Pentium III (Coppermine), Celeron w/SSE";
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return "Mobile Pentium III";
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case 9:
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case 10:
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return "Mobile Pentium III (Banias)";
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return "Pentium III Xeon (Cascades)";
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case 10:
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case 11:
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return "Pentium III Xeon (Cascades)";
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return "Pentium III (130 nm)";
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case 11:
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}
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return "Pentium III (130 nm)";
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case 13:
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return "Mobile Pentium III (Dothan)";
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case 14:
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return "Mobile Core (Yonah)";
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case 15:
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return "Core 2 (Conroe)";
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}
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} else {
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if (getCPUExtendedModel() == 1){
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switch(getCPUModel()){
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case 10:
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return "Core i7";
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case 12:
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return "Atom";
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case 13:
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return "Xeon MP";
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}
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}
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}
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}
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}
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if(getCPUFamily() == 7){
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if(getCPUFamily() == 7){
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switch(getCPUModel()){
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switch(getCPUModel()){
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@ -384,6 +454,10 @@ public class CPUID {
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return "Pentium IV (130 nm)";
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return "Pentium IV (130 nm)";
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case 3:
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case 3:
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return "Pentium IV (90 nm)";
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return "Pentium IV (90 nm)";
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case 4:
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return "Pentium IV (90 nm)";
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case 6:
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return "Pentium IV (65 nm)";
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}
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}
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}
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}
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if(getCPUExtendedFamily() == 1){
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if(getCPUExtendedFamily() == 1){
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@ -407,7 +481,7 @@ public class CPUID {
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System.out.println("CPU Family: " + getCPUFamily());
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System.out.println("CPU Family: " + getCPUFamily());
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System.out.println("CPU Model: " + getCPUModel());
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System.out.println("CPU Model: " + getCPUModel());
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System.out.println("CPU Stepping: " + getCPUStepping());
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System.out.println("CPU Stepping: " + getCPUStepping());
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System.out.println("CPU Flags: " + getCPUFlags());
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System.out.println("CPU Flags: " + getEDXCPUFlags());
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CPUInfo c = getInfo();
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CPUInfo c = getInfo();
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System.out.println(" **More CPUInfo**");
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System.out.println(" **More CPUInfo**");
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@ -415,6 +489,10 @@ public class CPUID {
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System.out.println(" CPU has MMX: " + c.hasMMX());
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System.out.println(" CPU has MMX: " + c.hasMMX());
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System.out.println(" CPU has SSE: " + c.hasSSE());
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System.out.println(" CPU has SSE: " + c.hasSSE());
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System.out.println(" CPU has SSE2: " + c.hasSSE2());
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System.out.println(" CPU has SSE2: " + c.hasSSE2());
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System.out.println(" CPU has SSE3: " + c.hasSSE3());
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System.out.println(" CPU has SSE4.1: " + c.hasSSE41());
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System.out.println(" CPU has SSE4.2: " + c.hasSSE42());
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System.out.println(" CPU has SSE4A: " + c.hasSSE4A());
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if(c instanceof IntelCPUInfo){
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if(c instanceof IntelCPUInfo){
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System.out.println(" **Intel-info**");
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System.out.println(" **Intel-info**");
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System.out.println(" Is pII-compatible: "+((IntelCPUInfo)c).IsPentium2Compatible());
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System.out.println(" Is pII-compatible: "+((IntelCPUInfo)c).IsPentium2Compatible());
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@ -1,6 +1,6 @@
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/*
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/*
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* Created on Jul 16, 2004
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* Created on Jul 14, 2004
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*
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* Updated on Jan 8, 2011
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*/
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*/
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package freenet.support.CPUInformation;
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package freenet.support.CPUInformation;
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@ -42,5 +42,25 @@ public interface CPUInfo
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*/
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*/
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public boolean hasSSE2();
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public boolean hasSSE2();
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/**
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* @return true iff the CPU support the SSE3 instruction set.
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*/
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public boolean hasSSE3();
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/**
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* @return true iff the CPU support the SSE4.1 instruction set.
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*/
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public boolean hasSSE41();
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/**
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* @return true iff the CPU support the SSE4.2 instruction set.
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*/
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public boolean hasSSE42();
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/**
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* @return true iff the CPU support the SSE4A instruction set.
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*/
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public boolean hasSSE4A();
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public boolean IsC3Compatible();
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public boolean IsC3Compatible();
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}
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}
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@ -16,6 +16,9 @@ import net.i2p.crypto.KeyGenerator;
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* A private key is 256byte Integer. The private key represents only the
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* A private key is 256byte Integer. The private key represents only the
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* exponent, not the primes, which are constant and defined in the crypto spec.
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* exponent, not the primes, which are constant and defined in the crypto spec.
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*
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*
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* Note that we use short exponents, so all but the last 28.25 bytes are zero.
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* See http://www.i2p2.i2p/how_cryptography for details.
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*
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* @author jrandom
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* @author jrandom
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*/
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*/
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public class PrivateKey extends SimpleDataStructure {
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public class PrivateKey extends SimpleDataStructure {
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@ -50,4 +53,24 @@ public class PrivateKey extends SimpleDataStructure {
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return KeyGenerator.getPublicKey(this);
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return KeyGenerator.getPublicKey(this);
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}
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}
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/**
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* We assume the data has enough randomness in it, so use the last 4 bytes for speed.
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* Overridden since we use short exponents, so the first 227 bytes are all zero.
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* Not that we are storing PrivateKeys in any Sets or Maps anywhere.
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*/
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@Override
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public int hashCode() {
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if (_data == null)
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return 0;
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int rv = _data[KEYSIZE_BYTES - 4];
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for (int i = 1; i < 4; i++)
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rv ^= (_data[i + (KEYSIZE_BYTES - 4)] << (i*8));
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return rv;
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}
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@Override
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public boolean equals(Object obj) {
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if ((obj == null) || !(obj instanceof PrivateKey)) return false;
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return DataHelper.eq(_data, ((PrivateKey) obj)._data);
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}
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}
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}
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@ -152,7 +152,9 @@ public class LogManager {
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if (_writer != null)
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if (_writer != null)
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return;
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return;
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_writer = new LogWriter(this);
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_writer = new LogWriter(this);
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Thread t = new I2PThread(_writer, "LogWriter", true);
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// NOT an I2PThread, as it contains logging and we end up with problems
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Thread t = new Thread(_writer, "LogWriter");
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t.setDaemon(true);
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t.start();
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t.start();
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}
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}
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Reference in New Issue
Block a user